
malloc2-other:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400538 <.init>:
  400538:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40053c:	910003fd 	mov	x29, sp
  400540:	9400003a 	bl	400628 <printf@plt+0x58>
  400544:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400548:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400550 <malloc@plt-0x20>:
  400550:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400554:	90000090 	adrp	x16, 410000 <printf@plt+0xfa30>
  400558:	f947fe11 	ldr	x17, [x16, #4088]
  40055c:	913fe210 	add	x16, x16, #0xff8
  400560:	d61f0220 	br	x17
  400564:	d503201f 	nop
  400568:	d503201f 	nop
  40056c:	d503201f 	nop

0000000000400570 <malloc@plt>:
  400570:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a30>
  400574:	f9400211 	ldr	x17, [x16]
  400578:	91000210 	add	x16, x16, #0x0
  40057c:	d61f0220 	br	x17

0000000000400580 <__libc_start_main@plt>:
  400580:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a30>
  400584:	f9400611 	ldr	x17, [x16, #8]
  400588:	91002210 	add	x16, x16, #0x8
  40058c:	d61f0220 	br	x17

0000000000400590 <__gmon_start__@plt>:
  400590:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a30>
  400594:	f9400a11 	ldr	x17, [x16, #16]
  400598:	91004210 	add	x16, x16, #0x10
  40059c:	d61f0220 	br	x17

00000000004005a0 <abort@plt>:
  4005a0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a30>
  4005a4:	f9400e11 	ldr	x17, [x16, #24]
  4005a8:	91006210 	add	x16, x16, #0x18
  4005ac:	d61f0220 	br	x17

00000000004005b0 <puts@plt>:
  4005b0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a30>
  4005b4:	f9401211 	ldr	x17, [x16, #32]
  4005b8:	91008210 	add	x16, x16, #0x20
  4005bc:	d61f0220 	br	x17

00000000004005c0 <free@plt>:
  4005c0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a30>
  4005c4:	f9401611 	ldr	x17, [x16, #40]
  4005c8:	9100a210 	add	x16, x16, #0x28
  4005cc:	d61f0220 	br	x17

00000000004005d0 <printf@plt>:
  4005d0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a30>
  4005d4:	f9401a11 	ldr	x17, [x16, #48]
  4005d8:	9100c210 	add	x16, x16, #0x30
  4005dc:	d61f0220 	br	x17

Disassembly of section .text:

00000000004005e0 <.text>:
  4005e0:	d280001d 	mov	x29, #0x0                   	// #0
  4005e4:	d280001e 	mov	x30, #0x0                   	// #0
  4005e8:	aa0003e5 	mov	x5, x0
  4005ec:	f94003e1 	ldr	x1, [sp]
  4005f0:	910023e2 	add	x2, sp, #0x8
  4005f4:	910003e6 	mov	x6, sp
  4005f8:	580000c0 	ldr	x0, 400610 <printf@plt+0x40>
  4005fc:	580000e3 	ldr	x3, 400618 <printf@plt+0x48>
  400600:	58000104 	ldr	x4, 400620 <printf@plt+0x50>
  400604:	97ffffdf 	bl	400580 <__libc_start_main@plt>
  400608:	97ffffe6 	bl	4005a0 <abort@plt>
  40060c:	00000000 	.inst	0x00000000 ; undefined
  400610:	0040073c 	.inst	0x0040073c ; undefined
  400614:	00000000 	.inst	0x00000000 ; undefined
  400618:	004007d0 	.inst	0x004007d0 ; undefined
  40061c:	00000000 	.inst	0x00000000 ; undefined
  400620:	00400850 	.inst	0x00400850 ; undefined
  400624:	00000000 	.inst	0x00000000 ; undefined
  400628:	90000080 	adrp	x0, 410000 <printf@plt+0xfa30>
  40062c:	f947f000 	ldr	x0, [x0, #4064]
  400630:	b4000040 	cbz	x0, 400638 <printf@plt+0x68>
  400634:	17ffffd7 	b	400590 <__gmon_start__@plt>
  400638:	d65f03c0 	ret
  40063c:	00000000 	.inst	0x00000000 ; undefined
  400640:	b0000080 	adrp	x0, 411000 <printf@plt+0x10a30>
  400644:	91012000 	add	x0, x0, #0x48
  400648:	b0000081 	adrp	x1, 411000 <printf@plt+0x10a30>
  40064c:	91012021 	add	x1, x1, #0x48
  400650:	eb00003f 	cmp	x1, x0
  400654:	540000a0 	b.eq	400668 <printf@plt+0x98>  // b.none
  400658:	90000001 	adrp	x1, 400000 <malloc@plt-0x570>
  40065c:	f9443821 	ldr	x1, [x1, #2160]
  400660:	b4000041 	cbz	x1, 400668 <printf@plt+0x98>
  400664:	d61f0020 	br	x1
  400668:	d65f03c0 	ret
  40066c:	d503201f 	nop
  400670:	b0000080 	adrp	x0, 411000 <printf@plt+0x10a30>
  400674:	91012000 	add	x0, x0, #0x48
  400678:	b0000081 	adrp	x1, 411000 <printf@plt+0x10a30>
  40067c:	91012021 	add	x1, x1, #0x48
  400680:	cb000021 	sub	x1, x1, x0
  400684:	9343fc21 	asr	x1, x1, #3
  400688:	8b41fc21 	add	x1, x1, x1, lsr #63
  40068c:	9341fc21 	asr	x1, x1, #1
  400690:	b40000a1 	cbz	x1, 4006a4 <printf@plt+0xd4>
  400694:	90000002 	adrp	x2, 400000 <malloc@plt-0x570>
  400698:	f9443c42 	ldr	x2, [x2, #2168]
  40069c:	b4000042 	cbz	x2, 4006a4 <printf@plt+0xd4>
  4006a0:	d61f0040 	br	x2
  4006a4:	d65f03c0 	ret
  4006a8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006ac:	910003fd 	mov	x29, sp
  4006b0:	f9000bf3 	str	x19, [sp, #16]
  4006b4:	b0000093 	adrp	x19, 411000 <printf@plt+0x10a30>
  4006b8:	39412260 	ldrb	w0, [x19, #72]
  4006bc:	35000080 	cbnz	w0, 4006cc <printf@plt+0xfc>
  4006c0:	97ffffe0 	bl	400640 <printf@plt+0x70>
  4006c4:	52800020 	mov	w0, #0x1                   	// #1
  4006c8:	39012260 	strb	w0, [x19, #72]
  4006cc:	f9400bf3 	ldr	x19, [sp, #16]
  4006d0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4006d4:	d65f03c0 	ret
  4006d8:	17ffffe6 	b	400670 <printf@plt+0xa0>
  4006dc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4006e0:	910003fd 	mov	x29, sp
  4006e4:	f9000fa0 	str	x0, [x29, #24]
  4006e8:	b90017a1 	str	w1, [x29, #20]
  4006ec:	d2800200 	mov	x0, #0x10                  	// #16
  4006f0:	97ffffa0 	bl	400570 <malloc@plt>
  4006f4:	f90017a0 	str	x0, [x29, #40]
  4006f8:	f94017a0 	ldr	x0, [x29, #40]
  4006fc:	f9400fa1 	ldr	x1, [x29, #24]
  400700:	f9000001 	str	x1, [x0]
  400704:	f94017a0 	ldr	x0, [x29, #40]
  400708:	b94017a1 	ldr	w1, [x29, #20]
  40070c:	b9000801 	str	w1, [x0, #8]
  400710:	f94017a0 	ldr	x0, [x29, #40]
  400714:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400718:	d65f03c0 	ret
  40071c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400720:	910003fd 	mov	x29, sp
  400724:	f9000fa0 	str	x0, [x29, #24]
  400728:	f9400fa0 	ldr	x0, [x29, #24]
  40072c:	97ffffa5 	bl	4005c0 <free@plt>
  400730:	d503201f 	nop
  400734:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400738:	d65f03c0 	ret
  40073c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400740:	910003fd 	mov	x29, sp
  400744:	90000000 	adrp	x0, 400000 <malloc@plt-0x570>
  400748:	91220000 	add	x0, x0, #0x880
  40074c:	f90017a0 	str	x0, [x29, #40]
  400750:	52800141 	mov	w1, #0xa                   	// #10
  400754:	f94017a0 	ldr	x0, [x29, #40]
  400758:	97ffffe1 	bl	4006dc <printf@plt+0x10c>
  40075c:	f90013a0 	str	x0, [x29, #32]
  400760:	f94013a0 	ldr	x0, [x29, #32]
  400764:	f9400000 	ldr	x0, [x0]
  400768:	f9000fa0 	str	x0, [x29, #24]
  40076c:	f94013a0 	ldr	x0, [x29, #32]
  400770:	f9400001 	ldr	x1, [x0]
  400774:	f94013a0 	ldr	x0, [x29, #32]
  400778:	b9400802 	ldr	w2, [x0, #8]
  40077c:	90000000 	adrp	x0, 400000 <malloc@plt-0x570>
  400780:	91222000 	add	x0, x0, #0x888
  400784:	97ffff93 	bl	4005d0 <printf@plt>
  400788:	90000000 	adrp	x0, 400000 <malloc@plt-0x570>
  40078c:	91224000 	add	x0, x0, #0x890
  400790:	f94017a1 	ldr	x1, [x29, #40]
  400794:	97ffff8f 	bl	4005d0 <printf@plt>
  400798:	f94013a0 	ldr	x0, [x29, #32]
  40079c:	f9400001 	ldr	x1, [x0]
  4007a0:	90000000 	adrp	x0, 400000 <malloc@plt-0x570>
  4007a4:	91224000 	add	x0, x0, #0x890
  4007a8:	97ffff8a 	bl	4005d0 <printf@plt>
  4007ac:	f94013a0 	ldr	x0, [x29, #32]
  4007b0:	97ffffdb 	bl	40071c <printf@plt+0x14c>
  4007b4:	f90013bf 	str	xzr, [x29, #32]
  4007b8:	f9400fa0 	ldr	x0, [x29, #24]
  4007bc:	97ffff7d 	bl	4005b0 <puts@plt>
  4007c0:	52800000 	mov	w0, #0x0                   	// #0
  4007c4:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4007c8:	d65f03c0 	ret
  4007cc:	00000000 	.inst	0x00000000 ; undefined
  4007d0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4007d4:	910003fd 	mov	x29, sp
  4007d8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4007dc:	90000094 	adrp	x20, 410000 <printf@plt+0xfa30>
  4007e0:	90000095 	adrp	x21, 410000 <printf@plt+0xfa30>
  4007e4:	91374294 	add	x20, x20, #0xdd0
  4007e8:	913722b5 	add	x21, x21, #0xdc8
  4007ec:	a902dff6 	stp	x22, x23, [sp, #40]
  4007f0:	cb150294 	sub	x20, x20, x21
  4007f4:	f9001ff8 	str	x24, [sp, #56]
  4007f8:	2a0003f6 	mov	w22, w0
  4007fc:	aa0103f7 	mov	x23, x1
  400800:	9343fe94 	asr	x20, x20, #3
  400804:	aa0203f8 	mov	x24, x2
  400808:	97ffff4c 	bl	400538 <malloc@plt-0x38>
  40080c:	b4000194 	cbz	x20, 40083c <printf@plt+0x26c>
  400810:	f9000bb3 	str	x19, [x29, #16]
  400814:	d2800013 	mov	x19, #0x0                   	// #0
  400818:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40081c:	aa1803e2 	mov	x2, x24
  400820:	aa1703e1 	mov	x1, x23
  400824:	2a1603e0 	mov	w0, w22
  400828:	91000673 	add	x19, x19, #0x1
  40082c:	d63f0060 	blr	x3
  400830:	eb13029f 	cmp	x20, x19
  400834:	54ffff21 	b.ne	400818 <printf@plt+0x248>  // b.any
  400838:	f9400bb3 	ldr	x19, [x29, #16]
  40083c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400840:	a942dff6 	ldp	x22, x23, [sp, #40]
  400844:	f9401ff8 	ldr	x24, [sp, #56]
  400848:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40084c:	d65f03c0 	ret
  400850:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400854 <.fini>:
  400854:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400858:	910003fd 	mov	x29, sp
  40085c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400860:	d65f03c0 	ret
